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June 4, 2026

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Synopsys IC Compiler II Delivers Five Fold Implementation Speed up, Enables Silicon Success

Success Drives PanasonicSoC Adoption of IC Compiler II Highlights · IC Compiler II enables first-time working silicon for high-performance multimedia design in 40-nm technology · 5X faster design implementation enables faster turn-around-time for

October 28, 2014
News

Synopsys and Gowin Semiconductor Ink Multi-Year OEM Agreement for FPGA Design Software

Synopsys Synplify Pro Synthesis Tool Delivers Superior Quality of Results for Users of Gowin Semiconductor FPGAs Highlights: Multi-year agreement provides Gowin FPGA users with Synopsys’ Synplify Pro high-quality FPGA synthesis tool to

October 27, 2014
News

VIA Technologies Cuts Silicon Test Time by 11X Using Synopsys’ DFTMAX Ultra!

Highlights:  DFTMAX™ Ultra compression technology deliver 11X higher compression and reduced test time  Higher test quality with shorter test time drove VIA’s standardization on DFTMAX Ultra for pin-limited designs  Deployment of DFTMAX

October 20, 2014
News

Synopsys Enables Superior Verification Planning and Coverage Analysis with Verdi Coverage

Highlights: Verdi, the industry’s open debug platform, now provides innovative planning and coverage technology integrated across all debug views, which allows users to quickly analyze and cross-probe holes identified through coverage analysis

October 14, 2014
News

Synopsys Kicks Off ITC 2014 Activities with Test SIG Event Featuring Semiconductor Leaders Sharing Insights on Newest Silicon Test Technologies!

Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, will showcase advances in its comprehensive synthesis-based test solution during the International

October 13, 2014
News

HiSilicon Chooses Synopsys’ PrimeTime ADV for Faster Timing Closure

Achieves Single-pass Timing and Power ECO Closure on Multiple Tapeouts Including FinFET Highlights HiSilicon has chosen PrimeTime ADV for timing closure in advanced IC design flow Accurate single-pass timing and power closure

October 9, 2014
News

TSMC Selects Synopsys as “2014 Partner of the Year” for Interface IP and Joint Development of 16-nanometer FinFET Plus Design Infrastructure!

Highlights: TSMC selects Synopsys as its “Partner of the Year” for interface IP and tool enablement for the 5th consecutive year The Interface IP Partner of the Year award selection criteria include

October 8, 2014
News

Synopsys Releases Verification IP for Mobile PCIe Technology

Native SystemVerilog-based VIP for PCI Express architecture now supports M-PCIe technology, with built-in coverage, verification plan and protocol-aware debug Synopsys, Inc. (NASDAQ: SNPS), a global leader providing software, IP and services used

October 7, 2014
News

Synopsys’ Galaxy Design Platform Delivers Over 30% Leakage Power Reduction for Fujitsu Semiconductor’s ARM-Powered Multi-Core!

Power Savings Enabled by Unique Techniques and Design Flow Supported by Design Compiler Graphical, IC Compiler and PrimeTime Tools Highlights: • MB86S70 processor designed with ARM®MaliTM-T624 GPUs, ARM Cortex®-A15 and Cortex-A7 processors

October 1, 2014
News

Synopsys Announces New Additions to Liberty to Significantly Speedup Timing Closure

Single, unified Liberty variation format standardized by the IEEE Industry Standards Board Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic

September 30, 2014
News

ARM and Synopsys Expand Collaboration to Improve Quality of Results and Time-to-Results for Leading-Edge ARMv8-A and ARMv7-A Cores

Industry Leaders Sign Multi-year Subscription Agreement to Accelerate Design and Verification of ARM-based SoCs using Synopsys Tools Highlights: Extended collaboration to benefit mutual customers with optimized Synopsys implementation, verification and software development

September 29, 2014
News

Synopsys Tools Achieve TSMC Certification for 16-nm FinFET+ Process and Entered 10-nm FinFET Collaboration

Certification of Digital and Custom Tools Enables Early Adopters to Realize QoR Benefits of the New Processes Highlights: Digital and custom tools from Galaxy™ Design Platform are ready for TSMC10-nm FinFET and 16-nm FinFET+ processes Successful 10-nm

September 25, 2014
News
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