HDL Verifier adds new FPGA hardware-in-the-loop testing capabilities MathWorks today announced new capabilities in HDL Verifier to speed up FPGA-in-the-loop (FIL) verification. The new FIL capabilities enable faster communication with the FPGA
Expands capabilities and simplifies working with big data in MATLAB MathWorks today introduced Release 2016b (R2016b) with new capabilities that simplify working with big data in MATLAB. Engineers and scientists can now