Synopsys’ New DesignWare Sensor and Control IP Subsystem Delivers Ultra Low Power Sensor and Control Processing for SoCs

Integrated IP Subsystem, Including ARC EM DSP Processors, Floating Point Unit and Control Peripherals, Improves Performance, Energy Consumption and Design Flexibility

· New DesignWare Sensor and Control IP Subsystem incorporates the latest ARC EM processors with cache and DSP extensions operating at over 500 MHz in a 40-nm low-power process

· Optional IEEE 754-2008 compliant FPU reduces energy consumption by 10X for sensor fusion applications executing floating point operations

· Extensive library of software DSP functions, such as complex math, filtering, matrix/vector and decimation/interpolation, speeds application software development

· Integrated hardware accelerators for sensor-specific functions boost performance efficiency and reduce power consumption by up to 85 percent compared to discrete solutions

· New integrated peripherals including complex math, filtering, matrix/vector and decimation/interpolation, speeds application software development interfaces expand connectivity options for embedded control functions

Synopsys_Logo_It Voice Synopsys, Inc. (Nasdaq:SNPS), a global leader  providing software, IP and services used to  accelerate innovation in chips and electronic  systems, today announced the new  DesignWare® Sensor and Control IP Subsystem, a complete hardware and software solution optimized for a wide range of ultra-low power embedded sensor and control applications. The Sensor and Control IP Subsystem integrates the DesignWare ARC®EM4, EM6, EM5D or EM7D 32-bit processors, delivering efficient real-time control and DSP performance required for ultra-low power sensor-and control-based applications. Newly integrated peripherals include a UART for serial communication as well as a Pulse Width Modulation (PWM) block and Digital-to-Analog Converter(DAC) interface for actuator/motor control functions. The optional IEEE 754-2008 compliant floating point unit (FPU) reduces energy consumption by up to 10X for sensor fusion applications implementing floating point operations. The DesignWare Sensor and Control IP Subsystem provides designers with a pre-verified, SoC-ready IP subsystem that delivers the energy-efficient processing required in markets such as the Internet of Things (IoT).

“Efficient integration of dedicated IP has become increasingly critical to meet the sensor processing requirements of IoT solutions,” said Chuck Gritton, chief technology officer at Hillcrest Labs. “Synopsys has created a compelling IP subsystem that helps designers create more power-, area-, and performance-efficient sensor processing solutions for IoT devices.”

The DesignWare Sensor and Control IP Subsystem is designed to process data from digital and analog sensors and always-on audio sources with minimal power consumption. This enables offloading of the host processor and more efficient processing of the data. The fully configurable subsystem includes the choice of an ARC EM4, EM6, EM5D or EM7D processor. All the processors support up to 2MB of closely coupled memory (CCM) for both instruction and data, while the EM6 and EM7Dalso incorporate up to 32KB of instruction and data cache for maximum system performance and flexibility. The EM5D and EM7D combine high-efficiency control and signal processing with more than 100 DSP instructions. The subsystem’s integrated UART, PWM and ARM® AMBA® APB™ interface peripherals combined with the configurable GPIO, SPI, I2C and ADC/DAC interfaces offer a wide range of off-chip sensor and actuator connections.

The DesignWare Sensor and Control IP Subsystem is optimized to process the extensive amount of data in sensor fusion applications. The subsystem includes a rich library of off-the-shelf DSP functions supporting filtering, correlation, matrix/vector, decimation/interpolation and complex math operations. Designers can implement these sensor-specific DSP functions in hardware using a combination of native DSP instructions within the EM5D or EM7Dprocessor and tightly coupled hardware accelerators to boost performance efficiency and reduce power consumption by up to 85 percent compared to discrete solutions. An optional IEEE 754-2008 compliant FPU reduces energy consumption by up to 10X for sensor applications requiring single- or double-precision floating point operations. Additionally, the ARC Processor Extension (APEX) technology enables designers to add their own user-defined instructions or existing hardware to the processor.

“Embedded sensor and control applications require a high level of integration with minimal power and area,” said John Koeter, vice president of marketing for IP and Prototyping at Synopsys. “The DesignWare Sensor and Control IP Subsystem gives designers a pre-integrated solution with flexibility and performance features so it can be optimized for each specific application. The subsystem’s combination of scalable performance, ultra-low power consumption and small silicon footprint enables designers to quickly integrate sensor and control functionality into their SoCs with less risk and effort.”

 Availability

The new DesignWare Sensor and Control IP Subsystem is scheduled to be available in January 2015.

Learn more about the Sensor and Control IP Subsystem: http://www.synopsys.com/dw/ipdir.php?ds=sensor_subsystem

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