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Cadence Unveils Next-Generation Virtuoso Platform Featuring Advanced Analog Verification Technologies And 10X Performance Improvements Across Platform

Highlights:

  • Next-generation Virtuoso ADE enables engineers to explore, analyze and verify designs against goals to ensure that design intent is maintained throughout the design cycle

  • Virtuoso Layout Suite offers up to 100X accelerated zoom, pan, drag and draw performance on large

Cadence Design Systems, Inc. (NASDAQ: CDNS) today cadence-logoannounced the delivery of the next-generation Virtuoso® platform which offers designers an  average of 10X performance and capacity improvement across the platform. The platform  includes new technologies within the Cadence® Virtuoso Analog Design Environment (ADE)  and enhancements to the Cadence Virtuoso Layout Suite to address requirements for automotive  safety, medical device and Internet of Things (IoT) applications.

For more information on the Virtuoso ADE product suite, please visit www.cadence.com/news/virtuosoade, and for more information on the Virtuoso Layout Suite, go  to www.cadence.com/news/virtuosols.

Next-Generation Virtuoso ADE Product Suite

The next-generation Cadence Virtuoso ADE product suite addresses the challenges that  come with the emergence of new industry standards, advanced-node designs and the  requirements for system design, enabling engineers to fully explore, analyze and verify designs  to ensure that design intent is maintained throughout the design cycle. Enhanced data handling  provides up to 20X improvement in loading waveform databases in excess of 1GB and a 50X  improvement in versioning and loading set-up files into the environment. The suite’s key  technologies include:

Virtuoso ADE Explorer: Enables fast and accurate real-time tuning of design specs,  provides pass/fail datasheets and delivers a complete corners and Monte Carlo statistical  environment for detecting and fixing variation problems

Virtuoso ADE Assembler: Enables engineers to analyze their designs under various process-voltage-temperature (PVT) combinations; also offers GUI-based verification  plans so designers can easily create conditional and dependent simulations

Virtuoso ADE Verifier: Provides a substantial technological advancement in analog verification, offering an integrated dashboard that lets engineers easily verify that all of  the blocks are contributing to the overall design specifications

“The new Virtuoso ADE Verifier technology and the Virtuoso ADE Assembler technology  run plan capability make our design teams more productive,” said Yanqiu Diao, deputy general  manager, Turing Processor business unit at HiSilicon Technologies Co., Ltd. “Through our early use of the new Cadence Virtuoso ADE product suite, we’ve found that we can improve analog IP  verification productivity by approximately 30 percent and reduce verification issues by one-half.  Our smartphone and network chip projects should benefit from these latest capabilities.”

Virtuoso Layout Suite Enhancements

The enhanced Virtuoso Layout Suite addresses the most complex layout challenges by  offering accelerated performance and productivity for custom analog, digital and mixed-signal  designs at the device, cell, block and chip levels. The suite’s latest updates provide the following  enhancements:

Graphics rendering performance: Provides from 10X to 100X accelerated zoom, pan,  drag and draw performance on large

Module Generator (ModGen): Interactive pattern manipulation flow that makes real- time customization of ModGens very visual and simple; also now supports synchronous  clones, which are layout elements with identical physical properties—like width and  length of transistors—that the layout designer can layout once and reuse

New structured device-level routing: Structured device-level routing capabilities can enhance routing productivity by as much as 50 percent

“Customers have continually placed their trust in the Cadence Virtuoso platform for more  than 25 years, taping out thousands of designs each year,” said Tom Beckley, senior vice  president and general manager, Custom IC & PCB Group at Cadence. “The need to do custom  design has never been greater, and increasing complexity is driving the need to further simplify  the design process so our customers can meet design schedules. Cadence remains at the forefront  of custom design innovation with the delivery of our next-generation Virtuoso platform, which enables fast, accurate custom design.”

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